The present invention relates to the structure and composition of metal bonding systems used to attach substrate wafers carrying light emitting diodes (LEDs) to other substrate wafers during LED manufacture. This application is related to Ser. No. 11/428,158 filed Jun. 30, 2006 for “Nickel Tin Bonding System For Semiconductor Wafers And Devices.”
Light emitting diodes (LEDs) are a class of photonic semiconductor devices that convert an applied voltage into light by encouraging electron-hole recombination events in an appropriate semiconductor material. In turn, some or all of the energy released in the recombination event produces a photon.
A typical LED includes p-type and n-type epitaxial layers (“epilayers”) that form a p-n junction for the current injection to produce the recombination events. These epilayers are typically grown on a substrate of the same or a different semiconductor. Epilayers can be produced with relatively high crystal quality and thus enhance the quality and operation of the resulting devices. The substrate portion of the device may not require the same level of quality, or in some cases, substrates formed of the same material as one or more of the epilayers are not easily available (or available at all).
Because of their wide bandgap and direct transition characteristics, the Group III nitride materials are favored for shorter wavelength light emitting diodes; i.e., those that emit in the blue, violet, and ultraviolet portions of the electromagnetic spectrum. The Group III nitride materials can, either in conjunction with diodes of other colors or with phosphors, produce white light. At the same time, Group III nitride substrate crystals of an appropriate size and quality are difficult or impossible to obtain. As a result, LEDs based on the Group III nitride material system typically include Group III nitride epilayers on sapphire or silicon carbide (SiC) substrates.
For a number of reasons, when the epitaxial layers of light-emitting semiconductor materials are formed (typically by chemical vapor deposition (“CVD”) growth) on a substrate, the resulting precursor structure is also added to an additional substrate. The second substrate may be other than a semiconductor or if it is a semiconductor, it is not necessarily present for semiconducting purposes. For example, in commonly assigned and co-pending U.S. Patent Application Publication No. 20060060877, a second substrate is used for mounting and fabrication purposes and to form a portion of a final LED structure. No. 20060060877 is incorporated entirely herein by reference. As set for therein and elsewhere, the manufacture of certain types of LEDs includes one or more steps to reduce the thickness of the original substrate (e.g., because the original substrate is thicker in order to make the initial manufacturing steps easier). Related background is set forth in commonly assigned U.S. Patent Application Publications Nos. 20060049411, 20060060872, 20060060874, and 20060060879, and the contents of each of these is likewise incorporated entirely herein by reference.
In other structures, light emitting diodes are mounted to second sets of substrates in order to reverse (flip) their normal orientation. Stated differently, in a typical orientation, the substrate is mounted to a lead frame and the epitaxial layers form the emitting face of the LED. In a flip chip orientation, however, the epitaxial layers are mounted towards the lead frame and the substrate provides the light emitting surface of the LED. Various steps in the process of manufacturing such flip chip diodes can require that the LED-carrying substrate wafer be joined to another substrate wafer either temporarily or permanently. In some flip-chip embodiments, the LED-carrying substrate wafer is removed from the epitaxial layers after the epitaxial layers are mounted to the temporary or permanent substrate wafer.
The conventional manner of joining the LED-carrying substrate wafer to another substrate wafer includes the use of various metal layers in a manner either identical or analogous to soldering or brazing. In many circumstances, a layer of titanium is deposited onto the respective surfaces to be joined, and then additional layers of bonding metals are added to form a bonding metal structure on each of the first and second substrates (sometimes referred to as the donor and acceptor substrates).
For number reasons, gold (Au) has historically been a predominant element in these bonding metal layers, often in the form of a gold-tin (Au—Sn) combination (including alloys) that is about 80:20 (Au:Sn) by weight. Gold is highly malleable, ductile and flexible and can be formed in extremely thin layers. Because it resists oxidation and other chemical reactions (which makes it, of course, historically valuable for jewelry and related items), gold also is attractive for its corrosion resistance; i.e., avoiding undesired reaction with its surroundings. Its malleability and a relatively moderate melting point (with respect to other metals), makes it ideal for soldering purposes.
These soldering steps require some application of heat. Thus, a soldering step used to join an LED substrate wafer to a second substrate wafer will heat the LEDs to some extent. As is well understood by those of ordinary skill in this art, whenever the temperature of the light emitting semiconductor epitaxial layers is raised, the probability is correspondingly raised that defects will be generated in the epitaxial layers. Typically, gold-tin based soldering (bonding, brazing) systems require temperatures above about 300° C. Although epitaxial layers of, for example, Group III nitride materials, can theoretically withstand such temperatures, in reality these temperatures significantly increase the probability that the bonding step will generate noticeable defects.
As yet an additional factor, when individual LEDs are separated from a wafer and mounted on a lead frame (e.g., a “die attach” to form a lamp), they are typically mounted on the lead frame with another soldering step. If the LED already contains a solder bond (i.e., between the device and substrate wafers), the existing solder bond should desirably remain unaffected by the temperatures required to solder the entire chip to the lead frame. Thus, the temperature at which the LED can be soldered to the lead frame will be limited by the temperature that the substrate-substrate bond can withstand without melting. Stated differently, the thermal characteristics of the substrate-substrate bonding metallurgy may unfavorably limit the type of solder that can be used to join an individual LED to an individual lead frame.
In particular, a pure 80:20, Au:Sn combination will tend to melt at temperatures above about 280° C. Thus, if the lead frame (or equivalent mounting) solder requires a temperature above 280° C., the possibility exists that the substrate bonding system may melt and fail.
Accordingly, a need exists for increasing the thermal capabilities of the substrate bonding system in a manner that complements or enhances, rather than limits, the die attach steps and that minimizes or eliminates adverse effects on the epitaxial layers.